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Meeting Pearls 4
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Meeting Pearls Vol. IV (1996)(GTI - Schatztruhe)[!].iso
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Spice
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1996-09-04
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4> spice3f5full_040 schmitt.cir
Program: Spice, version: 3f5
Port by: henric@zoom.com
Full version with FPU math for 040
Date built: 23:53:11 Sep 3 1996
Type "help" for more information, "quit" to leave.
Circuit: schmitt ckt - ecl compatible schmitt trigger
Warning: option lvlcod is obsolete.
Spice 1 -> listing deck
schmitt ckt - ecl compatible schmitt trigger
.width in=72
.tran 10ns 1000ns
vin 1 0 pulse(-1.6 -1.2 10ns 400ns 400ns 100ns 10000ns)
vee 8 0 -5
rin 1 2 50
rc1 0 3 50
r1 3 5 185
r2 5 8 760
rc2 0 6 100
re 4 8 260
rth1 7 8 125
rth2 7 0 85
cload 7 0 5pf
q1 3 2 4 qstd off
q2 6 5 4 qstd
q3 0 6 7 qstd
q4 0 6 7 qstd
.model qstd npn(is=1.0e-16 bf=50 br=0.1 rb=50 rc=10 tf=0.12ns tr=5ns
+ cje=0.4pf pe=0.8 me=0.4 cjc=0.5pf pc=0.8 mc=0.333 ccs=1pf va=50)
.print tran v(1) v(3) v(5) v(6)
.plot tran v(3) v(5) v(6) v(1)
-- hit return for more, ? for help --
.opt acct list node lvlcod=2
.end
Spice 2 -> run
Warning: vin: no DC value, transient time 0 value used
Spice 3 -> display all
V(1) : voltage, real, 101 long
V(2) : voltage, real, 101 long
V(3) : voltage, real, 101 long
V(4) : voltage, real, 101 long
V(5) : voltage, real, 101 long
V(6) : voltage, real, 101 long
V(7) : voltage, real, 101 long
V(8) : voltage, real, 101 long
q1#base : voltage, real, 101 long
q1#collector : voltage, real, 101 long
q2#base : voltage, real, 101 long
q2#collector : voltage, real, 101 long
q3#base : voltage, real, 101 long
q3#collector : voltage, real, 101 long
q4#base : voltage, real, 101 long
q4#collector : voltage, real, 101 long
time : time, real, 101 long [default scale]
vee#branch : current, real, 101 long
vin#branch : current, real, 101 long
Spice 4 -> plot v(3) v(5) v(6) v(1)
Spice 5 -> set
+ acct
* curplot tran1
* curplotdate Wed Sep 04 20:39:35 1996
* curplotname Transient Analysis
* curplottitle schmitt ckt - ecl compatible schmitt trigger
editor se
hcopydevtype postscript
hcopylinewidth 0.1
hcopyscale 2
history 1000
+ list
+ lvlcod 2
noaskquit
+ node
noglob
* plots ( const tran1 )
program Spice
prompt Spice ! ->
slowplot
sourcepath ( . progdir:/lib/scripts )
unixcom
x11lineararcs
-- hit return for more, ? for help --
Spice 6 -> hardcopy schmitt.eps v(3) v(5) v(6) v(1)
The file "schmitt.eps" may be printed on a postscript printer.
Spice 7 -> show all
BJT: Bipolar Junction Transistor
device q4 q3 q2 q1
model qstd qstd qstd qstd
ic 0.001 0.001 0.011 3.93e-08
ib 2.5e-05 2.5e-05 0.000 -6.33e-08
ie -0.001 -0.001 -0.011 2.4e-08
vbe 0.78 0.78 0.836 0.468
vbc -1.1 -1.1 -0.01 -1.34
gm 0.049 0.049 0.427 2.86e-07
gpi 0.001 0.001 0.013 5.64e-05
gmu 3.75e-05 3.75e-05 4.98e-05 3.6e-05
gx 0.02 0.02 0.02 0.02
go 2.5e-05 2.5e-05 0.000 1.45e-10
cpi 6.66e-12 6.66e-12 5.21e-11 5.64e-13
cmu 3.75e-13 3.75e-13 4.98e-13 3.6e-13
cbx 0 0 0 0
ccs 1e-12 1e-12 1e-12 1e-12
Capacitor: Fixed capacitor
device cload
model C
capacitanc 5e-12
i 2.71e-269
p 2.71e-269
Resistor: Simple linear resistor
device rth2 rth1 re rc2 r2 r1
model R R R R R R
resistance 85 125 260 100 760 185
i -0.022 0.024 0.011 0.011 0.004 0.005
p 0.042 0.077 0.033 0.012 0.018 0.004
Resistor: Simple linear resistor
device rc1 rin
model R R
resistance 50 50
i 0.005 -6.33e-08
p 0.001 2e-13
Vsource: Independent voltage source
device vee vin
dc -5 0
acmag 0 0
i 0.041 6.33e-08
p 0.206 1.01e-07
Spice 8 -> list
Spice 9 -> rtlinv.cir
Circuit: rtlinv ckt - cascaded rtl inverters
Warning: option lvlcod is obsolete.
Spice 10 -> run
Warning: vin: no DC value, transient time 0 value used
Spice 11 -> listing deck
rtlinv ckt - cascaded rtl inverters
.width in=72
.dc vin 0.0 2.5 0.025
.tran 2ns 200ns
vcc 6 0 5
vin 1 0 pulse(0 5 2ns 2ns 2ns 80ns)
rb1 1 2 10k
rc1 6 3 1k
q1 3 2 0 qnd
rb2 3 4 10k
q2 5 4 0 qnd
rc2 6 5 1k
.model qnd npn(bf=50 rb=70 rc=40 ccs=2pf tf=0.1ns tr=10ns cje=0.9pf
+ cjc=1.5pf pc=0.85 va=50)
.print dc v(3) v(5)
.plot dc v(3)
.print tran v(3) v(5)
.plot tran v(3) v(5) v(1)
.opt acct list node lvlcod=2
.end
Spice 12 -> plot v(3) v(5)
Press <return> to continue.
Spice 13 -> setplot
Type the name of the desired plot:
new New plot
Current tran2 rtlinv ckt - cascaded rtl inverters (Transient Analysis)
dc1 rtlinv ckt - cascaded rtl inverters (DC transfer characteristic)
tran1 schmitt ckt - ecl compatible schmitt trigger (Transient Analysis)
const Constant values (constants)
? tran1
Spice 14 -> plot v(3) v(5) v(6) v(1)
Press <return> to continue.
Spice 15 -> destroy all
Spice 16 -> run
Warning: vin: no DC value, transient time 0 value used
Spice 17 -> setplot
Type the name of the desired plot:
new New plot
Current tran2 rtlinv ckt - cascaded rtl inverters (Transient Analysis)
dc2 rtlinv ckt - cascaded rtl inverters (DC transfer characteristic)
const Constant values (constants)
?
Spice 18 -> plot v(3) v(5)
Press <return> to continue.
Spice 19 -> quit
Spice-3f5 done